1. Field of the Invention
The present invention relates to semiconductor devices such as high-frequency, ultra-high-frequency, high-speed-switching, or power devices and a method of manufacturing the semiconductor devices. In particular, the present invention relates to insulated gate semiconductor devices such as vertical field effect transistors, e.g., U- or V-MOSFETs employing a sidewall of a trench as a gate and a method of manufacturing such devices.
2. Description of the Prior Art
Vertical field effect transistors having a U-shaped groove (hereinafter referred to as the UMOSFETs) are widely used for motor controllers of cars and office automation equipment, communication equipment such as telephone exchanges, power sources, and flat panel display drivers. The vertical insulated gate transistors such as the UMOSFETs are more advantageous than lateral MOSFETs because they have lower ON resistance and smaller chip size.
FIG. 11 is a sectional view showing a UMOSFET according to a prior art. This UMOSFET is of n-channel type. A p-channel UMOSFET is also possible by replacing n with p. In the figure, a first conductivity type is n and a second conductivity type is p. An n+ epitaxial layer 129 serving as a drain region is formed on an n+ substrate 119. An n- epitaxial layer 14 serving as a drift region is formed on the epitaxial layer 129. An n+ region 26 serving as a source region is formed inside a p base layer 25. A U-groove is formed on the top surface of this structure. A gate oxide film 19 is formed along the surface of the U-groove, and a gate electrode 24 made of, for example, polysilicon is formed inside the U-groove. A drain electrode 21 is formed on the bottom surface of the n+ substrate 119. A metal source electrode 22 is formed on the n+ region 26. When this UMOSFET is used as a high-frequency high-speed-switching device, there are the following problems:
(1) The drain electrode 21 is formed on the bottom surface of the device, so that the source electrode 22 must be grounded through a bonding wire. This arrangement increases source inductance L.sub.s serving as floating impedance on the source side, as indicated in an equivalent circuit of FIG. 12. When using this device as a power device, it is necessary to consider heat dissipation. Namely, a highly heat conductive insulation substrate must be employed to separate the drain electrode 21 from the source to be grounded. PA1 (2) The gate electrode 24 faces the drain region 129 with the thin oxide film on the bottom of the U groove interposing between them as indicated with "B" in FIG. 11, to produce large feedback capacitance (gate-drain capacitance Cgd). PA1 (3) The gate electrode 24 and source region 26 are separated from each other with the thin oxide film (gate oxide film) 19 as indicated with "A" in FIG. 11, to produce large input capacitance (gate-source capacitance Cgs).